mirror of
https://github.com/RobCo-Industries/Pip-OS.git
synced 2026-08-24 10:04:26 -05:00
add support of mini UART in QEMU
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+7
-1
@@ -46,7 +46,13 @@ else
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QEMU_MACHINE = raspi3
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endif
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QEMU_FLAGS = -m 256 -M $(QEMU_MACHINE) -serial stdio
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QEMU_FLAGS = -m 256 -M $(QEMU_MACHINE)
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ifeq ($(USE_MINI_UART),1)
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QEMU_FLAGS += -serial null -serial stdio
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else
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QEMU_FLAGS += -serial stdio
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endif
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##################
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# FILES AND DIRS #
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+1
-1
@@ -10,7 +10,7 @@ enum
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#elif BCM2711
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PERIPHERAL_BASE = 0xFE000000,
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#else // BCM2835
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PERIPHERAL_BASE = 0x7E000000,
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PERIPHERAL_BASE = 0x7E000000, // try with 0x20000000
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#endif
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// The mailbox base address.
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+20
-19
@@ -9,25 +9,6 @@
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void uart_init()
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{
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uint32_t selector;
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// Setup the GPIO pin 14 && 15.
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selector = mmio_read(GPFSEL1);
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selector &= ~(7<<12); // clean gpio14
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selector |= 2<<12; // set alt5 for gpio14
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selector &= ~(7<<15); // clean gpio15
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selector |= 2<<15; // set alt5 for gpio15
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mmio_write(GPFSEL1, selector);
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// Disable pull up/down for all GPIO pins & delay for 150 cycles.
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mmio_write(GPPUD, 0x00000000);
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delay(150);
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// Disable pull up/down for pin 14,15 & delay for 150 cycles.
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mmio_write(GPPUDCLK0, (1 << 14) | (1 << 15));
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delay(150);
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// Write 0 to GPPUDCLK0 to make it take effect.
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mmio_write(GPPUDCLK0, 0x00000000);
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//Enable mini uart (this also enables access to it registers)
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mmio_write(AUX_ENABLES, 1);
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@@ -44,8 +25,28 @@ void uart_init()
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//Set RTS line to be always high
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mmio_write(AUX_MU_MCR_REG, 0);
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// Disable interrupts
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mmio_write(AUX_MU_IIR_REG, 0xc6);
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//Set baud rate to 115200
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mmio_write(AUX_MU_BAUD_REG, 270);
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// Setup the GPIO pin 14 && 15.
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selector = mmio_read(GPFSEL1);
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selector &=~((7<<12)|(7<<15)); // gpio14, gpio15
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selector |=(2<<12)|(2<<15); // alt5
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mmio_write(GPFSEL1, selector);
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// Disable pull up/down for all GPIO pins & delay for 150 cycles.
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mmio_write(GPPUD, 0x00000000);
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delay(150);
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// Disable pull up/down for pin 14,15 & delay for 150 cycles.
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mmio_write(GPPUDCLK0, (1 << 14) | (1 << 15));
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delay(150);
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// Write 0 to GPPUDCLK0 to make it take effect.
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mmio_write(GPPUDCLK0, 0x00000000);
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//Finally, enable transmitter and receiver
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mmio_write(AUX_MU_CNTL_REG, 3);
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